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JPS63204635A Expired / Lapsed JP ⏱️ 0.0 years remaining

Memory module

Assignee: NEC Corp
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Filing: 1987-02-19
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Granted: —
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Expires: 2007-02-19
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Abstract

Abstract PURPOSE:To make it possible to improve the packaging density of memory IC chips and to make possible a reduction in the thickness of a memory module by a method wherein the memory IC chips are superposed in two stages or more and moreover, are subjected to lead-bonding by a film carrier system. CONSTITUTION:Memory IC chips 10 and 10' are superposed in two stages with bonding agents 11 and are mounted on an insulative substrate 14 for a memory module. Electrodes of each memory IC chip of these memory IC chips 10 and 10' and bonding pads 9 of the substrate 14 are subjected to lead-bonding by a film carrier system using leads 15. Moreover, coating resins 16 are each coated on each memory IC chip 10 and 10' and the memory IC chips are sealed with a sealing resin 13 in such a way that the whole memory IC chips are coated. Thereby, an increase in the packaging density of the memory module and a reduction in its thickness are made possible.

Inventors

  • 👤 Koichi Takegawa
  • 👤 光一 竹川

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-29 17:30
CPC Classifications
H; H10; H10W; H10W72/00; H10W72/851; H10W72/874; H10W72/884; H10W90/00; H10W90/701; H10W90/731; H10W90/734; H10W90/751; H10W90/754

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