Hetero junction bipolar transistor and manufacture thereof

Abstract

Abstract PURPOSE:To improve the characteristic of a collector top structure hetero junction transistor by increasing the resistance of the upper layer of a semiconductor layer of a laminated structure for forming the emitter layer of an external base region over its thicknesswise direction. CONSTITUTION:An n<+> type GaAs layer 2 which forms an emitter layer and an n-type GaAs layer 3 are formed on a GaAs substrate 1, and an n-type AlGaAs layer 4 having a larger band gap than the layers 2, 3 is formed. A p<+> type GaAs layer 5 which forms a base layer is formed on the emitter layer, and an n-type GaAs layer 6 which forms a collector layer is formed thereon. An external base region is formed as a high resistance layer 9 all in the thicknesswise direction in the part of the layer 4. That is, its bottom 10 is formed in depth arriving at the layer 3. Accordingly, since the base region has high hetero barrier for all electrons or holes, carrier injection to the layer 9 is less. Even if many defects are presented in the layer 4, a recombination current is less. Thus, a high current gain can be obtained.

Inventors

• 👤 Kohei Moritsuka
• 👤 宏平 森塚

Bibliographic Details