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JPS63200528A Expired / Lapsed JP ⏱️ 0.0 years remaining

Manufacture of semiconductor device

Assignee: Toshiba Corp
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Filing: 1987-02-17
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Granted: —
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Expires: 2007-02-17
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Abstract

Abstract PURPOSE:To prevent a decrease in an operating margin of the device and a lowering of breakdown voltage by laminating a silicon dioxide film and a poly Si film after preparing a groove at a silicon substrate and also by implanting ions at side faces of the groove after leaving the poly Si film in the bottom of the groove. CONSTITUTION:A thermal oxidation film 103 and an Si3N4 film 104 are laminated at a silicon substrate 101 and these films are etched in sequence with a resist mask and then a groove is made at the substrate. They are covered by SiO2 106 after removing resist and poly Si 108 is left in the bottom of the groove C with a RIE technique after laminating poly Si 107. As ions are implanted in sequence at the side faces A and B of the groove after irradiating them slant wise and the N-layers 109 and 110 are formed. The Si3N4 film 104 is removed after etching selectively poly Si 108 with a CDE technique. Subsequently, SiO2 films 103 and 107 are removed after etching them and are covered with a gate oxide film 110 and then the As ions are implanted at the surface and in the bottom of the groove after performing a resist pattern 111. After that, a dynamic RAM device is completed by a normal technique. As this approach prevents an ion-implantation in the bottom of the groove, no lowerings in an operating margin of circuits or in breakdown voltage develop.

Inventors

  • 👤 Shizuo Sawada
  • 👤 沢田 静雄

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-30 04:55
CPC Classifications
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