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JPS63200221A Expired / Lapsed JP ⏱️ 0.0 years remaining

Automatic control circuit for clock pulse

Assignee: Fujitsu Ltd
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Filing: 1987-02-17
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Granted: —
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Expires: 2007-02-17
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Abstract

Abstract PURPOSE:To reduce the control manhour and to improve the control accuracy by providing a delay circuit and detecting the phase difference between the output of the delay circuit and the output of a programmable counter for selection of the delay value. CONSTITUTION:An external crystal oscillator 1 which produces a reference frequency is connected to an automatic clock pulse control circuit L consisting of an LSI and set into a CPU. Furthermore, the circuit L contains two control circuits A and B of the same constitution and sets a reference frequency at a desired level via an ordinary programmable counter 2 that can set freely an N-ary number with a program input. The phase comparators 3a-3b are provided to compare the phase of the output of the counter 2 with those of the outputs of delay circuits 7a-7b together with a drive circuit selecting decoder 4, the decoders 5a-5c, the up-down counters 6a-6b, etc. Then, a prescribed waveform is obtained by combining a pulse waveform of a frequency set by the counter 2 and the selection outputs A-C outputted from decoders 5a-5b.

Inventors

  • 👤 Hideyuki Obara
  • 👤 小原 秀行

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-04 09:52
CPC Classifications
—

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