← Back to Patent Explorer
JPS63198364A Expired / Lapsed JP ⏱️ 0.0 years remaining

Mold-type integrated circuit

Assignee: NEC Corp
•
Filing: 1987-02-13
•
Granted: —
•
Expires: 2007-02-13
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract PURPOSE:To realize the adaptation to the high integration by a method wherein individual chips are mounted face-to-face with each other on both faces of a lead frame. CONSTITUTION:A chip 10 is mounted on one face a of a lead frame; a pad on this chip 10 is connected to individual stiches 15 at the lead frame by using a bonding wire 11. In the same manner, the individual stiches 15 at the lead frame are connected by using bonding wires 11, 21. Accordingly, the pad on the chip 10 and the pad on a chip 20 are connected by using the bonding wires 11, 21 via the stiches 15 at the lead frame. If the chips 10, 20 are mounted on both faces of the lead frame, the area for mounting the chips is almost doubled even with the identical size of a mold by this setup; accordingly, the shape of a mold IC chip is miniaturized; the high integration is realized.

Inventors

  • 👤 Katsuharu Kimura
  • 👤 克治 木村

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-30 15:37
CPC Classifications
H; H10; H10W; H10W72/00; H10W72/50; H10W72/531; H10W72/536; H10W72/5363; H10W72/541; H10W72/5449; H10W90/00; H10W90/701; H10W90/751; H10W90/756

Claims Analysis

Total Claims: 0
No claims parsed yet. Click Sync Now above to re-index claims from Google Patents.

References Cited (Backward Citations)

No citation records indexed.

USPTO Annuity & Maintenance Windows

Maintenance schedule is calculated for granted US utility patents.

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag