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JPS63166271A Expired / Lapsed JP ⏱️ 0.0 years remaining

Manufacture of mis semiconductor device

Assignee: Fujitsu Ltd
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Filing: 1986-12-27
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Granted: —
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Expires: 2006-12-27
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Abstract

Abstract PURPOSE:To prevent an epitaxial silicon layer from being short circuited with a gate electrode during selective epitaxy processes including preliminary treatments, by providing a silicon nitride film on the surfaces of the side walls of an oxide insulation film isolating the gate electrode from the epitaxial silicon layer. CONSTITUTION:Subsequently after a poly Si gate electrode 8 is formed, an Si3N4 film 12 is formed by CVD so as to cover all over the substrate surface including the surfaces of a first SiO2 film 7 and of SiO2 side walls 8a and 8b, the first SiO2 film covering the surface of the gate electrode 6. The surface of the film 12 is then etched by a conventional RIE process but it is selectively left on the side walls 8a, 8b and the sides of the gate oxide film 5 lying thereunder. Preliminary epitaxy is performed in a conventional manner on the exposed surface of the substrate 1, Subsequently, epitaxial Si layers 9a and 9b are selectively deposited similarly to prior arts on the regions where source and drain are to be formed, in self-alignment manner with the sides of the side walls 8a, 8b having the film 12.

Inventors

  • 👤 Shinichirou Ikemasu
  • 👤 慎一郎 池増

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-02 01:21
CPC Classifications
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