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JPS63142452A Expired / Lapsed JP ⏱️ 0.0 years remaining

Interruption queue control system for system reset interruption

Assignee: Fujitsu Ltd
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Filing: 1986-12-04
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Granted: —
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Expires: 2006-12-04
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Abstract

Abstract PURPOSE:To eliminate a need of system reset processing by setting a system reset interruption to the queue pointed with a first interruption queue address pointer when previously queued interruption requests are all cleared. CONSTITUTION:A queue mechanism 31 is provided with a first interruption queue address pointer 31a and an address pointer to be next queued. If the system reset interruption request to clear all of previous interruption requests already queued in the queue mechanism 31 occurs, this interruption request is set to the queue pointed by the first interruption queue address pointer 31a, and the queue following this queue is pointed by the address pointer 31b to be next queued, and interruption requests are processed from the interruption request set to the queue pointed by the first interruption queue address pointer 31a.

Inventors

  • 👤 Takayuki Sawada
  • 👤 隆行 澤田

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-31 19:13
CPC Classifications
G; G06; G06F; G06F13/00; G06F13/14; G06F13/20; G06F13/24

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