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JPS63102243A Expired / Lapsed JP ⏱️ 0.0 years remaining

electrode wiring

Assignee: Fujitsu Ltd
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Filing: 1986-10-17
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Granted: —
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Expires: 2006-10-17
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Abstract

Abstract PURPOSE:To obtain an electrode wiring of excellent conductivity in which electro-migration and stress-migration are little, by constituting the electrode wiring on a semiconductor substrate in a layer structure of a core wiring layer and a cover wiring layer, and forming these two layers using specific metals which are different from each other. CONSTITUTION:On an Si substrate 1, a core wiring layer 2 about 1mum wide is formed by patterning a film made of any one of Al, Al alloy, high melting point metal, and nitride of high melting point metal, for example Al. The patterning is performed by anisotropic etching for which an ordinary photolithography technique and an RIE (reactive ion etching) method are applied. On both side surfaces of the core wiring layer 2a, a cover wiring layer 3a is formed in the manner in which one metal in the above metal group, for example Mo, is spread in a thickness of about 5000Angstrom by a sputtering method. When the cover wiring layer 3a of Mo is formed in this manner on both side surfaces of the core wiring layer 2a of Al, Mo of the both side surfaces serves as a barrier to prevent Al atom from protruding after deforming, and at the same time, creep of Al can be canceled by the effect of binding power for Mo.

Inventors

  • 👤 Kenji Nishida
  • 👤 健治 西田

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-09 03:38
CPC Classifications
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