Digital sigma modulation circuit for analog-digital converter

Abstract

Abstract PURPOSE:To exclude the effect of internal noise by selecting the amplification factor of the 1st and 2nd amplifiers nearly equally and selecting the said amplification factor respectively in a manner that the internal operating voltage of the 2nd integration device is a prescribed number of times of an analog input signal voltage or below. CONSTITUTION:The 1st and 2nd amplifiers 41, 44 for correcting the integration gain are provided to a double integration type DELTA-SIGMA modulation circuit and the amplification factors G1, G2 are selected to be twice - thrice or below the input signal IS1 voltage with respect to an internal operation voltage. In a DELTA-SIGMA modulation type A/D converter, an excellent S/N characteristic having the quantization accuracy corresponding to >=14-bit is obtained under the circuit setting condition where the internal operation voltage is limited below twice the IS1 voltage. In connecting a limiter circuit which limits the internal operating voltage to be twice the input signal IS1 voltage or below between the 1st integration device 42 and the 2nd adder 43 and between the 2nd integration device 45 and a quantizer 46 respectively, the circuit design condition of the 1st and 2nd integration devices 42, 45 is relaxed further. Thus, the internal operating voltage is suppressed and the circuit is almost immune to the internal noise.

Inventors

• 👤 Takao Suzuki
• 👤 孝夫 鈴木
• 👤 Yasuo Shoji
• 👤 庄司　保夫
• 👤 Yuichi Shiraki
• 👤 白木　裕一

Bibliographic Details