Semiconductor integrated circuit device

Abstract

Abstract PURPOSE:To effectively utilize an inner gate region by removing a buffer region formed heretofore, enlarging the inner gate region, composing to alternately disposing P-type and N-type MOS transistor rows, and constructing a buffer circuit of the transistor arrays for the inner gate, thereby omitting the waste in the buffer region. CONSTITUTION:A semiconductor integrated circuit device has a transistor array region (inner gate substrate) 1 and a pad region 3 only. The array region 1 is alternately arranged with the rows of P-type, N-type MOS transistors. P-type and N-type MOS transistor regions 15, 16 are formed of 2 MOS transistors in such a manner that the sources or the drains of two transistors are composite. Terminals 18, 19 are connected with a power source VDD and a ground point. When P-type MOS transistors T1-T6, N-type MOS transistors T7-T12 are wired suitably in parallel, an output buffer is formed. Similarly, an input buffer is composed by the transistors of the region 1.

Inventors

• 👤 Masahiro Ueda
• 👤 昌弘 植田
• 👤 Takahiko Arakawa
• 👤 荒川　隆彦

Bibliographic Details