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JPS628558A Expired / Lapsed JP ⏱️ 0.0 years remaining

Semiconductor integrated circuit device

Assignee: Hitachi Ltd
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Filing: 1985-07-05
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Granted: —
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Expires: 2005-07-05
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Abstract

Abstract PURPOSE:To make it possible to write data after data-line forming processes and to shorten process completing time, by extending the data lines, which are connected to memory cell rows, to the outside of the upper parts of the channel forming region of an MISFET, in a logitudinal mask ROM. CONSTITUTION:Conductor layers 10A and 10B are electrically connected to specified semiconductor regions 7 and 8 through a connecting hole 9A. The upper part of an insulating film 9 is extended to the direction of rows. Data lines are extended to the outside of the upper parts of the channel forming regions of memory cells Q1-Q8. After the forming processes of the memory cells Q1-Q8 and the data lines DLs, n-type impurity ions are introduced in the channel forming region 2 through gate electrode 6A by ion implantation technology. Thus the first threshold voltage is converted into the second threshold voltage. After the forming processes of the data lines DLs, the data is written.

Inventors

  • 👤 Takashi Shibata
  • 👤 柴田 隆嗣

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-31 07:53
CPC Classifications
H; H10; H10B; H10B20/00

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