Semiconductor memory device

Abstract

Abstract PURPOSE:To stabilize a cell plate potential by providing a sense circuit comparing the potential of a monitor memory cell with a reference potential and controlling the output impedance of a cell plate potential generator circuit. CONSTITUTION:At the time of an action after the cell node potential of the monitor memory cell 1 drops below a VCC, nodes N1 and N2 in the sense circuit 2 come to levels 'H' and 'L', respectively. A MOSFET-Q7 is turned off, and the gates of MOSFETs -Q1 and Q2 in the cell plate potential generator circuit 4 become a level H through a MOSFET-Q6, and are turned on. Namely the output impedance of a cell plate potential setting circuit CPG decreases, and speedily recovers even if a cell plate CP develops the potential fluctuation. Thus the cell plate potential is stabilized, whereby dRAM's erroneous action can be prevented.

Inventors

• 👤 Masaki Momotomi
• 👤 正樹 百冨
• 👤 Fumio Horiguchi
• 👤 文男 堀口
• 👤 Yasuo Ito
• 👤 寧夫 伊藤

Bibliographic Details