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JPS6281815A Expired / Lapsed JP ⏱️ 0.0 years remaining

Analog-digital conversion circuit

Assignee: Toshiba Corp
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Filing: 1985-10-04
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Granted: —
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Expires: 2005-10-04
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Abstract

Abstract PURPOSE:To stabilize the multi-value information conversion by providing a circuit averaging a picture signal to the pre-stage of a reference level setting circuit of an A/D converter. CONSTITUTION:A picture signal Si outputted from a picture processing circuit 4 is averaged by an averaging circuit 10 and the a prescribed multiplication or addition processing by a level setting circuit 11, the one is given to the A/D converting circuit 1 as a high level reference value VH as it is, and the other is processed by a level converting circuit 12 and given to the A/D conversion circuit as a low level reference value VL. Thus, the reference voltage of the A/D converter 1 follows the level of the picture signal Si and since the voltage follows the background level fluctuation of the picture information, the multi-value information conversion by the A/D conversion circuit 1 is made stable. Further, in order to correct the delay in the processing time by the averaging circuit 10 or the level setting circuit 11, the picture signal Si inputted to the A/D conversion circuit 1 is retarded by the delay circuit.

Inventors

  • 👤 Masahiko Iga
  • 👤 正彦 伊賀
  • 👤 Takeshi Hayashi
  • 👤 武史 林

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-31 03:47
CPC Classifications
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