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JPS6281041A Expired / Lapsed JP ⏱️ 0.0 years remaining

Formation of element isolation region

Assignee: Oki Electric Industry Co Ltd
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Filing: 1985-10-03
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Granted: —
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Expires: 2005-10-03
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Abstract

Abstract PURPOSE:To suppress the spreading of diffusion layer formed by channel stop impurities by a method wherein the first oxide film, a nitride film and the second oxide film are formed in a laminated state on the surface of a semiconductor substrate, and after said films have been divided into element isolation regions by performing a photolithographic method, the third oxide film is grown, a frame is formed within the boundary of the element isolation regions using the third oxide film, by performing a complete etch-back with anisotropic etching, and channel stop impurities are ion-implanted. CONSTITUTION:The first oxide film 11, a nitride film (Si3N4) 12, and the second oxide film 13 are formed on the surface of a semiconductor substrate 10, and after a resist film 14 has been formed, an aperture is formed by performing a photolithographic method. After the resist film 14 has been removed, the third oxide film (SiO2) 15 is formed. The oxide film 15 is removed by performing an anisotropic etching having a directional property, and a frame 15-1 is formed thereon. Then, channel stop impurities are implanted, and the P<+> type diffusion layer 16 which is a channel stop region is formed. The oxide film 13, the frame 15-1 and the thermal oxide film 11 are removed, and after the surface of the semiconductor substrate 10 has been exposed, a nitride film (Si3N4) 17 is formed again. The nitride film 17 is removed by performing an anisotropic etching, and a frame 17-1 is formed. A field oxide film (SiO2) 18 is formed on a diffusion layer 16, and then the nitride film 12 and the frame 17-1 are removed.

Inventors

  • 👤 Hideki Ito
  • 👤 英樹 伊東

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-31 20:29
CPC Classifications
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