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JPS6269635A Expired / Lapsed JP ⏱️ 0.0 years remaining

Supporting jig for semiconductor wafer

Assignee: Toshiba Corp
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Filing: 1985-09-24
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Granted: —
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Expires: 2005-09-24
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Abstract

Abstract PURPOSE:To realize a light-weight, small-size transporting system by a method wherein a middle layer is covered with an adhesive layer of paste whose adhesive force degrades under conditions different from the conditions the middle layer is under. CONSTITUTION:On a substrate 1, a middle layer 2 is formed and allowed to harden. An adhesive layer 3 is formed on the middle layer 2, and a semiconductor wafer 4 is pasted to the adhesive layer 3. The entirety is attached to a dicing unit for dicing. The semiconductor wafer 4 is completely cut when the dicing is so accomplished that a blade creates a dicing groove 5 deep enough to reach the middle layer 2. Thereafter, the semiconductor wafer 4 as supported by an assembling jig is transported to a mounting unit whereat all the semiconductor chips are installed on a lead frame. Exposure to UV rays or the like is accomplished for reducing the adhesive layer 3 in its adhesive force. Such a setup allows the semiconductor chips to be easily peeled off and to be sucked up with a very weak adsorbing force. Need for a heavy-weight flat ring is eliminated, which results in a light-weight transporting system.

Inventors

  • 👤 Yasumasa Noda
  • 👤 野田 康昌

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-27 11:34
CPC Classifications
H; H10; H10P; H10P72/00; H10P72/70; H10P72/74; H10P72/7402; H10P72/7416

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