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JPS625649A Expired / Lapsed JP ⏱️ 0.0 years remaining

Package for integrated circuit

Assignee: NEC IC Microcomputer Systems Co Ltd
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Filing: 1985-07-01
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Granted: —
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Expires: 2005-07-01
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Abstract

Abstract PURPOSE:To improve the wirings of a signal by providing a plurality of pads at an arbitrary positions of one external connecting terminal, and a plurality of inner terminals connected with one external connecting terminal to wire bond with the pads. CONSTITUTION:Integrated circuit chips 5 placed on a chip placing unit of an integrated circuit package 1 for a sole power source (VCC) with 32 pins are distributed on four sides, only two types of VCC and GND have a plurality of electrodes, inner terminals 2, 2,... of the package 1 corresponding thereto are alternately disposed at the inner terminals of VCC, GND at every two pieces, and the inner terminals are connected with the pads 6 on the chip by bonding wirings 7. Thus, a signal used in an integrated circuit chip can be wire bonded to necessary position.

Inventors

  • 👤 Masami Hayakawa
  • 👤 早川 正美

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-04 12:57
CPC Classifications
H; H10; H10W; H10W72/00; H10W72/50; H10W72/541; H10W72/5449

Claims Analysis

Total Claims: 0
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References Cited (Backward Citations)

JPS5394875A Cited
JPS58110063A Cited

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