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JPS6252971A Expired / Lapsed JP ⏱️ 0.0 years remaining

Non-volatile semiconductor memory device

Assignee: Mitsubishi Electric Corp
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Filing: 1985-08-30
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Granted: —
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Expires: 2005-08-30
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Abstract

Abstract PURPOSE:To facilitate secure writing and erasing with moderately high voltage by a method wherein an insulating film region, whose thickness of a gate insulating film between a floating gate and a source and between the floating gate and a semiconductor substrate and whose width is smaller than the width of the floating gate, is provided between the floating gate and a sidewise diffused region from a drain. CONSTITUTION:A tunnel oxide film 9, whose film thickness is smaller than the thickness of a gate oxide film 8 and whose width is smaller than the width of a floating fate 4, is formed. This tunnel oxide film 9 with a minute area and a thin film thickness can be formed, for instance, by a method wherein, after the film 9 is formed with the same thickness as the gate oxide film 8, etching process is applied to this region only to obtain the predetermined film thickness and shape. This tunnel region is so provided as to overlap an N<+>type region formed by the sidewise diffusion from a drain 7. Moreover, in order to realize high integrity, the patterns of the floating gate 4 and a control gate 5 are overlapped in plan view.

Inventors

  • 👤 Kazuo Kobayashi
  • 👤 和男 小林
  • 👤 Yasushi Terada
  • 👤 寺田 康
  • 👤 Takeshi Nakayama
  • 👤 武志 中山

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-30 04:57
CPC Classifications
H; H10; H10B; H10B69/00

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