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JPS6249643A Expired / Lapsed JP ⏱️ 0.0 years remaining

Semiconductor device and its manufacture

Assignee: NEC Corp
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Filing: 1985-04-19
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Granted: —
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Expires: 2005-04-19
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Abstract

Abstract PURPOSE:To achieve a high density integration capable of fine multi-layer wiring, by laying a BPSG film in the groove to constitute a separation region where the BPSG film makes no air gap in the groove and its surface is kept flat. CONSTITUTION:On the surface of the P-type silicon substrate 1, an N-type buried collector layer 2 is formed, on which an N-type epitaxial layer 3 is formed. The groove 4 is formed reaching a silicon substrate 1 through the layers 2 and 3. Said groove 4 is almost vertical, whose width and depth are 1.0Xm and 5Xm, respectively. On the surface of an epitaxial layer 3 and the inner surface of the grove 4, thermal oxidation films 5 and 6 are formed, respectively. A BPSG film 7 is buried in a manner in which it makes no air gap in the groove 4 and its upper surface keeps a flat plane. In this manufacturing method, a polysiloxane solution containing boron and phosphorus as an impurity is spread on the substrate by rotation, and the spread BPSG film is subjected to a reflow thermal treatment at a temperature 850 deg.C or higher.

Inventors

  • 👤 Masahiko Nakamae
  • 👤 正彦 中前

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-01 19:25
CPC Classifications
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Claims Analysis

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References Cited (Backward Citations)

JPS57112047A Cited
JPS59106133A Cited

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