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JPS6247142A Expired / Lapsed JP ⏱️ 0.0 years remaining

Marking method for semiconductor device

Assignee: NEC Corp
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Filing: 1985-08-27
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Granted: —
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Expires: 2005-08-27
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Abstract

Abstract PURPOSE:To enable marking again by setting a mark region on a vacant area of part of the periphery of an Si wafer, and conducting simultaneous marking in the area. CONSTITUTION:Marking area 3, 6, 8, 9 are set to vacant areas of a wafer 1, and a mark is formed on the area 3 by a laser light 5 in size of 10-50mum and at pitch of 10-50mum. A circuit tester 10 and the wafer 1 on a base 7 of a probe 13 are connected through a probe card 11, and the test result of an IC 2 is stored together with coordinates in the tester 10 by a command of a controller 12. An improper mark is attached corresponding to the position of an improper IC 2 by the light 5 on the area 3. The area 6 is marked at retesting time. After the wafer is cut into ICs in next step, the area 6 is pattern- recognized to read out an improper mark 4. According to this configuration, the wafer states can be sorted to be marked, and when assembled at every mark, manufacturing steps are shortened.

Inventors

  • 👤 Sadao Matai
  • 👤 又井 定男

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-06 17:52
CPC Classifications
—

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