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JPS6246552A Expired / Lapsed JP ⏱️ 0.0 years remaining

Manufacture of semiconductor device

Assignee: Toshiba Corp
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Filing: 1985-08-23
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Granted: —
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Expires: 2005-08-23
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Abstract

Abstract PURPOSE:To improve controllability and reliability by a method wherein a twin type CMOS is built without forming a bulge along the boundary between a P-type well region and N-type well region adjoining each other. CONSTITUTION:The quantity d1, which is the result of side etching, may easily be controlled because it is determined in proportion to the etching time. For the formation of a first well region, impurity ions are implanted with a resist pattern 8 serving as a blocking mask. The resist pattern 8 is removed, whereafter a selective oxidation process is performed with a patterned oxidation- resistant film 7 serving as a mask. A second oxide film 5 is formed, its ends forming bird's beaks going into under the oxidation-resistant film 7. The quantity d2 representing the dimension of the bird's beak penetration is dependent upon the conditions of oxidation and upon the thickness of the oxidation- resistant film 7, which ensures excellent controllability over the quantity d2. This results in a discharge of separation between the first and second well regions that is the sum of the quantities d1 and d2.

Inventors

  • 👤 Yoichiro Niitsu
  • 👤 新津 陽一郎

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-09 08:24
CPC Classifications
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