← Back to Patent Explorer
JPS624334A Expired / Lapsed JP ⏱️ 0.0 years remaining

Checking system with wafer prober

Assignee: Tokyo Electron Ltd
•
Filing: 1985-07-01
•
Granted: —
•
Expires: 2005-07-01
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract PURPOSE:To shorten the working process by a method wherein, after the first tests are performed by the first placing means, a wafer is transferred to the second placing means and the second tests are performed. CONSTITUTION:A wafer, which is transported from a wafer cassette input means 7 by way of an automatic alignment means 5, is attracted onto a placing table of the first placing means 1 and electrical characteristics of respective chips are tested. After the tests on the wafer by the means 1 are completed, the wafer is transferred onto the placing table of the second placing means 2 by a transfer means 6 and the other electrical characteristics which can not be tested by the means 1 are tested. When the wafer is subjected to the tests, electrode pads on the respective chips and measuring cables of a tester A and a tester B are brought into contact with each other by contact means 3 and 4.

Inventors

  • 👤 Keiichi Yokota
  • 👤 横田 敬一

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-05 12:11
CPC Classifications
—

Claims Analysis

Total Claims: 0
No claims parsed yet. Click Sync Now above to re-index claims from Google Patents.

References Cited (Backward Citations)

No citation records indexed.

USPTO Annuity & Maintenance Windows

Maintenance schedule is calculated for granted US utility patents.

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag