Semiconductor memory device
Abstract
Abstract PURPOSE:To analyze the defect of a memory part by providing an instruction memory part control part selectively outputting a signal which activates and deactivates an instruction memory part outputting a standby memory selecting signal. CONSTITUTION:When a WE signal and a write power source potential point 12 are set to a level H and a high potential, respectively, data is written in the variable threshold nonvolatile memory 810 of an instruction memory part control part 8. Then, since an RD signal from the part 8 is made at the level H, the instruction memory part 7 is deactivated to make its R/CCAM signal at the level H. Moreover the standby decoder selecting transistor 404 of a replacement control part 4 becomes conductive, and the output node 401 of the replacement control part 4 comes to a level L. Accordingly a standby memory part 2 is not selected, but a decoder carries out a decoding action. Thus, if all addresses of a memory part 1 are inspected in such a state, the defective cells of the memory part 1 can be investigated.
Inventors
- 👤 Takeshi Toyama
- 👤 毅 外山
- 👤 Kenji Koda
- 👤 香田 憲次
- 👤 Toshihiro Koyama
- 👤 小山 利弘
Bibliographic Details
Claims Analysis
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