Input protecting circuit

Abstract

Abstract PURPOSE:To perform an effective input protecting circuit by forming the channel region of a field transistor of the circuit in a shape for surrounding a pad, thereby forming a field transistor having a large channel. CONSTITUTION:An N<+> type layer 2 formed at the periphery of a pad 1 is electrically connected through a contacting hole 5 with the pad 1 to be a drain of a field transistor. The channel 3 of the field transistor disposed directly under the input pad 1 is formed to surround the periphery of the pad. The source region 4 of the transistor is formed of an N<+> type layer, an aluminum layer 7 of GND level is electrically connected with the N<+> type layer of the source 4 through a contacting hole 6. When a surge is input to the pad 1, the transistor is immediately turned ON to rapidly escape to the GND 7 through the channel 3 having long channel length and hence large area. Thus, it can prevent the inner node from damaging.

Inventors

• 👤 Kazutami Arimoto
• 👤 和民 有本
• 👤 Hiroshi Miyamoto
• 👤 博司 宮本
• 👤 Shigeru Mori
• 👤 茂 森

Bibliographic Details