Memory circuit

Abstract

Abstract PURPOSE:To simultaneously read and write by providing a reading circuit for outputting the data and a writing circuit for writing the data and writing simultaneously in a writing address different from a reading address during reading. CONSTITUTION:A writing circuit 25 consists of two transfer gates Q28, Q29 constituting two writing buffers G22 and writing gates. An input of a buffer G25 is connected to a writing information terminal WD. A writing address decoder circuit 26 inputs a writing address from writing address input terminals WAD0-WADm and outputs decoded outputs AW1-AWn. L parts excluding a reading decoder circuit and the writing decoder circuit are arranged and connected to the outputs AR1-ARn, AW1-AWn similarly to the case of one bit in parallel, a memory of (n) words X (l) bits can be constituted and the reading and the writing are individually designated by the address. Thereby, the reading and the writing can be simultaneously performed.

Inventors

• 👤 Toshi Sano
• 👤 佐野　東志

Bibliographic Details