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JPS62260353A Expired / Lapsed JP ⏱️ 0.0 years remaining

Qsemiconductor device

Assignee: Mitsubishi Electric Corp
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Filing: 1986-05-06
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Granted: —
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Expires: 2006-05-06
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Abstract

Abstract PURPOSE:To prevent the large increase of the volume of the whole even when the number of LSI chips loaded for enlarging a functional scale is increased by laminating and mounting a plurality of wiring substrates so that the main surfaces of the wiring substrates mutually run parallel. CONSTITUTION:A plurality of semiconductor chips 11 having active functions consisting of P-N junctions are disposed onto a plurality of wiring substrates 13, 14, main surfaces of which have wirings mutually connecting and compounding the active functions of these semiconductor chips 11 and external electrodes extracting the functions of the chips to the outside. A plurality of these wiring substrates 13, 14 are laminated and fitted onto an insulating substrate 16 fixing and holding electrical functions acquired by said wiring substrates 13, 14 and having external pins 17 for transmitting the electrical functions over the outside so that the main surfaces of the wiring substrates mutually run parallel. Accordingly, a large number of the LSI chips can be loaded without enlarging the volume of the whole so much, and the number of the LSI chips can easily be increased only by the number of newly laminated layers when the number fo the wiring substrates laminated are increased.

Inventors

  • 👤 Miyoshi Yoshida
  • 👤 吉田 美義

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-23 12:57
CPC Classifications
H; H10; H10W; H10W70/00; H10W70/60; H10W70/611; H10W90/00; H10W90/401; H05; H05K; H05K1/00; H05K1/02; H05K1/14; H05K1/141; H05K1/144

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