Thin film mos transistor

Abstract

Abstract PURPOSE:To manufacture the title device with high on-off ratio by a method wherein the source and drain electrodes of an inverse staggered thin film transistor are flat-connected through the intermediary of an n<+>layer with other parts of both electrodes and channel semiconductor layer insulated by insulating film. CONSTITUTION:A Cr gate electrode 2 is formed on a glass sheet 1 and then an SiO2 gate film 3, an amorphous Si 4 and a P added n<+>amorphous Si 5 are laminated to selectively etch the layers 5 and 4. The n<+>layers 5 in the channel part are selectively etched to be covered with PSGs 6 and then an electrode window is made to be coated with Cr as source and drain electrodes 7, 8 or gate leading-out electrodes. In such a constitution, if gate electrode potential is negative to the source electrode, any hole induced by high resistant amorphous layer 4 can not flow as hole current due to the barrier by n<+>layers 5 so that off current may not flow upward to manufacture a TFT device with inverse staggered high on-off ratio in AC voltage driven mode.

Inventors

• 👤 Kikuo Ono
• 👤 記久雄 小野
• 👤 Yoshikazu Hosokawa
• 👤 細川　義和
• 👤 Nobutake Konishi
• 👤 信武 小西
• 👤 Takaya Suzuki
• 👤 誉也 鈴木
• 👤 Kenji Miyata
• 👤 健治 宮田

Bibliographic Details