Data processor

Abstract

Abstract PURPOSE:To perform the emulation with an action similar to an actual application state by adding a means which calculates the difference between the address of an instruction under execution and a prefetching address and outputting outside the offset value of said arithmetic means together with the control signal that invalidates the instruction prefetched by an instruction register. CONSTITUTION:The contents of a program counter PC set in an execution unit 6 are supplied directly to a memory access control circuit 7. Then an instruction stored in an FIFO 3 is supplied to a microaddress generating circuit 4 in accordance with the contents supplied to the circuit 7. At the same time, a part of the microinstruction read out of a micro-ROM 1 is supplied to the circuit 7. Based on this partial microinstruction, such a fact that the jump instructions, etc., are not executed in the order of prefetched instructions is detected. In such a case, the circuit 7 outputs the FIFO reset signal F-RES to the FIFO 3 to invalidate all instructions so far prefetched by the FIFO 3.

Inventors

• 👤 Yuji Oota
• 👤 祐二 太田

Bibliographic Details