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JPS6214528A Expired / Lapsed JP ⏱️ 0.0 years remaining

Intermediate frequency amplifying circuit with electric field intensity detecting function

Assignee: NEC Corp
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Filing: 1985-07-11
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Granted: —
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Expires: 2005-07-11
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Abstract

Abstract PURPOSE:To improve the linearity of the log characteristic of a DC output to an input voltage by connecting mutually two double balanced differential amplifiers different in gain in parallel to form a double balanced differential amplifier constituting a full-wave rectifier in each stage. CONSTITUTION:Transistors TRs Q1-Q10 constitute the full-wave rectifier in the first stage, and TRs Q11-Q20 constitute that in the second stage, and TRs Q21-Q30 constitute that in the third stage, and TRs Q31-Q40 constitute that in the fourth stage. An adding circuit ADD adds positive-phase output currents of full-wave rectifiers in the first-fourth stages and smoothes this addition current and outputs the input signal level as a DC voltage VS. If an input signal VIN is increased gradually, double balanced differential amplifiers are saturated in order from the last stage. If emitter resistances R3, R4,... R15, R16, and RE (R3=R4=...=R15=R16=RE) are provided and the value of the resistance RE is selected properly, the linearity of the log characteristic of the voltage VS to the voltage VIN is improved. Thus, the electric field detecting function which has a high saturation input signal level and a wide dynamic range is provided.

Inventors

  • 👤 Katsuharu Kimura
  • 👤 克治 木村
  • 👤 Yukio Yokoyama
  • 👤 幸男 横山

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-09 04:40
CPC Classifications
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