Semiconductor device

Abstract

Abstract PURPOSE:To contrive to improve the reliability by effective utilization of chips by reducing the area needed to bonding pads by a method wherein those of peripheries along the chip's shorter sides and the chip's longer sides which are larger in distance between arrays and the chip's longer sides are provided with bonding pads. CONSTITUTION:Memory cell arrays 131, 131 and memory cell arrays 132, 132 are arranged with center lines parallel with the longer sides of the chip 11 shifted from each other. Bonding pads 14... are provided in those of peripheries along the shorter sides of the chip 11 and the longer sides which are larger in distance between the longer sides of the chip 11 and the memory cell arrays 131, 131, 132, 132. Then, those regions of peripheries along the longer sides of the chip 11 which are provided with the bonding pads 14... require a width (a) of about 200mum, whereas the width (b) of the regions not provided with the bonding pads 14... can be reduced to about 30mum.

Inventors

• 👤 Isao Ogura
• 👤 庸 小倉
• 👤 Fumio Horiguchi
• 👤 文男 堀口
• 👤 Shigeyoshi Watanabe
• 👤 重佳 渡辺

Bibliographic Details