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JPS6184041A Expired / Lapsed JP ⏱️ 0.0 years remaining

Semiconductor device

Assignee: Fujitsu Ltd
•
Filing: 1984-10-02
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Granted: —
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Expires: 2004-10-02
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Abstract

Abstract PURPOSE:To prevent moisture vapor from permeating into a chip by a method wherein the first and the second layers are laminated on the surface of chip while the first layer comprising sealing plastic material contains no parting agent and the second layer comprises thermal shock absorbing plastic material. CONSTITUTION:A pellet comprising 27wt% of filler gamma-SiO2 (mean particle diameter of 15mum) 1wt% of carbon black and 1wt% of flame retarder mounted on an Si chip 3 is heated up to around 160 deg.C to form the first coating layer 6 by means of melting and hardening the pellet. Next Si resin potted is heated up to 150 deg.C and hardened to form the second coating layer 7. The sealing material comprising 100wt% of the first coating layer 6 added to 1wt% of synthetic wax is heated and formed into a package. In such a constitution, the adhesive property of chip 3 to wires 5 may be improved since the first layer 6 coming into contact with the chip surface contains no parting agent while the thermal shock between a forming body 8 and the chip 3 may be reduced due to the thermal shock absorption characteristics of the second layer 7 making no gaps on the adhesive planes between the forming body 8 and inner lead 4, wires 5 to improve the moisture vapor resistance.

Inventors

  • 👤 Rikuro Sono
  • 👤 薗 陸郎

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-08 15:48
CPC Classifications
H; H10; H10W; H10W74/00; H10W74/40; H10W74/47; H10W74/473; H10W74/10; H10W74/111; H10W74/121; H10W72/00; H10W72/01; H10W72/015; H10W72/01515; H10W72/071; H10W72/075; H10W72/07551; H10W72/50; H10W72/851; H10W72/874; H10W72/884; H10W90/00; H10W90/701; H10W90/731; H10W90/736; H10W90/751; H10W90/756

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