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JPS6180455A Expired / Lapsed JP ⏱️ 0.0 years remaining

Data processor

Assignee: Fujifilm Business Innovation Corp
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Filing: 1984-09-28
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Granted: —
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Expires: 2004-09-28
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Abstract

Abstract PURPOSE:To attain the simultaneous use of >=2 displays connected to a single processor by providing an input information selecting means consisting of plural buffer memories, scanning circuits, etc., and a multi-window output circuit, etc. CONSTITUTION:An operator A operates one of the displayed windows while looking at a CRT-A40 and transmits his/her own operating will to a processor 32 via an information input means 33. In such a case, the input information is stored in a buffer memory A46. While the input information is stored in a buffer memory B47 when another operator B operates another displayed window while looking at a CRT-B41. A scanning circuit 48 functions to connect both memories A46 and B47 alternately to the processor 32. Thus two types of input information are supplied to the processor 32 by operators A and B with a time lag set between both inputs. via two CRTs.

Inventors

  • 👤 Harunobu Kinoshita
  • 👤 木下 治信

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-08 18:43
CPC Classifications
—

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