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JPS6174465A Expired / Lapsed JP ⏱️ 0.0 years remaining

Vertical synchronizing signal generation circuit

Assignee: Sanyo Electric Co Ltd
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Filing: 1984-09-20
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Granted: —
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Expires: 2004-09-20
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Abstract

Abstract PURPOSE:To simplify circuit configuration by obtaining a signal in frame period small in position changes between pulses as it synchronizes with a specific field, and forming an inside vertical synchronizing signal in frame period which synchronizes with the signal in frame period. CONSTITUTION:A signal from an outside vertical synchronizing signal input terminal 1 is processed by 1/2 frequency dividing circuit 2 and an AND gate 3, and converted into a signal synchronizing with a field period, and supplied to the first synchronization circuit 4 and the second phase detecting circuit 17. Also, the signal from an outside horizontal synchronizing signal input terminal 12 is processed by nfH VCO 9 and 1/N frequency dividing circuit 10, and two different first and second inside pulses, which synchronize with the horizontal synchronizing signal are outputted as reference signals. These inside pulses are added to the first and second synchronization circuits 4, 5 as timing signals to generate inside vertical synchronizing signal in frame period. These signals are supplied to the first and second counters 6, 7 where inside pulse is supplied, and the counters 6, 7 process the inside vertical synchronizing signal, and the result is outputted from an inside vertical synchronizing signal output terminal 8.

Inventors

  • 👤 Takeshi Arai
  • 👤 武 新井
  • 👤 Masami Ebara
  • 👤 江原 正己
  • 👤 Hiroyuki Ueyama
  • 👤 植山 浩行

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-06 03:55
CPC Classifications
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