Semiconductor device and manufacture thereof

Abstract

Abstract PURPOSE:To prevent the disconnection of wiring at the connecting part of a gate electrode and a lead part in the GaAs FET in which an active region present on a buffer layer shows a mesa shape by making the plane for forming a gate electrode lead part higher. CONSTITUTION:An intrinsic AlGaAs layer 12 and a GaAs layer 13 are formed on a substrate 1 similarly to in the conventional devices and the outer sides of an active part forming region 3a, a gate electrode lead part forming region 10a, and a gate pad forming region 11a are subjected to the first mesa etching up to a surface of the AlGaAs layer 12 in order to isolate the elements. Nextly, the region composed of the regions 10a and 11a is etched by the second mesa etching up to such thickness that a thickness of the GaAs layer 13 can be removed by the next gate recess. A difference in level produced by the above etching regulates the difference in level between the gate electrode 9 and the lead part 10. After that, the region, which is composed of the regions 9a and 11a, and the region in region 10a which connecting the both, is etched so as to form a channel region 6, a gate electrode lead part 10, and a gate pad 11.

Inventors

• 👤 Yoshimi Yamashita
• 👤 良美 山下
• 👤 Kinshiro Kosemura
• 👤 小瀬村　欣司郎
• 👤 Hidetoshi Ishiwari
• 👤 石割　秀敏
• 👤 Sumio Yamamoto
• 👤 純生 山本

Bibliographic Details