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JPS6136962A Expired / Lapsed JP ⏱️ 0.0 years remaining

Package for electronic circuit

Assignee: NEC Corp
•
Filing: 1984-07-30
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Granted: —
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Expires: 2004-07-30
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Abstract

Abstract PURPOSE:To improve yield, to reduce cost and to enhance reliability on quality by combining a high-temperature baked substrate with a common power-supply wiring circuit and a low-temperature baked substrate with a signal wiring circuit by solder. CONSTITUTION:A high-temperature baked substrate 1 has a power-supply wiring circuit 11, pin pads 12, pads 13 for connection and through holes 14. On the other hand, a low-temperature baked substrate 2 has pads 21 for connection and through holes 22, and integrated circuits 5 are mounted onto the upper surface of the substrate 2 through an insulating layer section 24. The pads 13, 21 for connecting each substrate 1, 2 are connected electrically and mechanically through solder 4. Accordingly, when signal line patterns in the substrate 2 and the integrated circuits 5 get trouble, both substrates 1, 2 are separated by melting solder 4, and these signal line patterns and integrated circuits can be exchanged with acceptables.

Inventors

  • 👤 Shoji Nakakita
  • 👤 中北 昭二

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-09 22:26
CPC Classifications
H; H10; H10W; H10W70/00; H10W70/60; H10W70/611; H10W90/00; H10W90/401; H05; H05K; H05K1/00; H05K1/02; H05K1/14; H05K1/144; H05K3/00; H05K3/30; H05K3/32; H05K3/34; H05K3/341; H05K3/3431; H10W72/00; H10W72/50; H10W72/531; H10W72/5363; H10W72/851; H10W72/874; H10W72/884; H10W90/701; H10W90/731; H10W90/734; H10W90/751; H10W90/754

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