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JPS6129485A Expired / Lapsed JP ⏱️ 0.0 years remaining

Memory circuit

Assignee: NEC Corp
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Filing: 1984-07-19
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Granted: —
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Expires: 2004-07-19
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Abstract

Abstract PURPOSE:To prevent a current from being consumed unnecessary in order to hold information with use of a battery by connecting a pull-up resistance to the output isde of a memory IC dirve circuit of three-state outputs. CONSTITUTION:A control circuit 2 and plural memory cards 1 are connected through a signal line 11. A control signal 15 for making the output of a drive circuit 13 in the high impedance state is connected to a signal line 12 for showing the power source interrpution. Moreover, a pull-up resistance 14 is connected to the output side of the circuit 13. When a switch S7 is connected to the side of a contact 7-1 and electric power is supplied from a power supply source 8, the card 1 is driven by the circuit 13. When the power source is interrupted to connect the S7 to the side of a contact 7-2, a signal is inputted to the signal line 12, and the operation is made in the information holding state by a battery 9. At this time, the state of the signal line 11 has nothing to do with the input state of a memory IF3 due to an output signal 15. Furthermore the unnecessary consumption of a current will not occur thanks to the battery 9. Thus the power consumption for holding information can be prevented.

Inventors

  • 👤 Keiichi Adachi
  • 👤 足立 啓一

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-04 11:45
CPC Classifications
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