Logical circuit system

Abstract

Abstract PURPOSE:To attain the parallel processing of instructions by providing a new flag to those instructions which can be executed in parallel. CONSTITUTION:It is decided by the parallel execution flag of the 1st field whether the instructions are executed in parallel or not. This flag is added from an assembler, etc. when an instruction is produced. When an instruction to which the parallel execution flag is set is extracted, an instruction extracting part extracts the next instruction before the execution is through with the fist instruction and interprets and executes the next instruction. Thus the pipeline processing is applied to the instruction to which the parallel execution flag is set. While the conventional sequential processing is applied to an instruction to which the parallel execution flag is reset. Thus an optional instruction can be used to both the parallel processing and the sequential processing as necessary by means of said execution flag. This can form a flexible instruction system.

Inventors

• 👤 Masatoshi Sekine
• 👤 優年 関根

Bibliographic Details