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JPS61235969A Expired / Lapsed JP ⏱️ 0.0 years remaining

memory device

Assignee: Ricoh Co Ltd
•
Filing: 1985-04-11
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Granted: —
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Expires: 2005-04-11
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Abstract

Abstract PURPOSE:To attain the inversion of the LSB and MSB simply at high sped by switching the input/output part at a part or all of the address of a memory means of the input/output device address. CONSTITUTION:A multiplexer 2 selects the position A when the most significant bit AMB is set and selects the position B when the AMB is not set. Since the address is a binary number representation, a half of all the addresses is used when the most significant bit is '1' and '0', and divided into the upper and lower halves of the memory 1. In writing the data to a memory 1, when the addresses upper than the half are accessed, after the LSB and the MSB are inverted by the multiplexer 2 and they are written, and when the addresses lower than the half are accessed, the multiplexer 2 is passed through as it is and the memory is written.

Inventors

  • 👤 Yoshihide Arai
  • 👤 良英 新居

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-09 02:44
CPC Classifications
G; G06; G06F; G06F13/00; G06F13/14; G06F13/16

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