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JPS61134838A Expired / Lapsed JP ⏱️ 0.0 years remaining

Control system of microprogram

Assignee: NEC Corp
•
Filing: 1984-12-04
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Granted: —
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Expires: 2004-12-04
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Abstract

Abstract PURPOSE:To avoid the waste of the memory capacity by holding plural microinstruction groups of different bits at a register after storing those instruction groups to each memory and supplying an invalid bit to a control subject after adding is to the pat of microinstruction which is less than the maximum number of bits of the register. CONSTITUTION:A microprogram memory 1 consists of microinstruction group memories 1a and 1b of short and long word lengths. The microinstruction read out of the memory 1 is stored to a register 3. Then the application of addressing is possible via a register 3 to a memory 1a or 1b storing the microinstruction to be read next. The upper bits of an address delivered from the register 2 are retrieved by a word length detecting circuit 4 for detection of a microinstruction of the long or short word length. Then a transmission gate 5 is opened and closed. The gate 5 is closed with an instruction of the short word length and an invalid field NOP is added to a control subject.

Inventors

  • 👤 Noriyuki Tachibana
  • 👤 橘 則行

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-30 21:36
CPC Classifications
G; G06; G06F; G06F9/00; G06F9/06; G06F9/22; G06F9/26; G06F9/262; G06F9/264; G06F9/267

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