Memory circuit

Abstract

Abstract PURPOSE:To attain an access time similar to that of a semiconductor memory not having any redundancy configuration when the redundancy configuration is not used by using a delay circuit including a program element. CONSTITUTION:When a program element RF1 of a fuse latch circuit 19 is not programmed, an output of the circuit 19 goes to low level and when programmed, the output goes to high level. When no redundancy configuration is used, the element RF1 is not programmed, a node N6 goes to high level, an N- chMOSFETQN1 and a P-chMOSFETQP1 are both turned off, a capacitor C1 is interrupted from the N1, the N1 is transmitted to an inverter 16 without delay and the inactive period of a row active signal RA is T. On the other hand, in using the redundancy configuration, the element RF1 is programmed, an output N6 of an inverter 18 goes to low level, the QP1, QN1 both turn on, the N1 is connected to the capacitor C1, a delay is produced in the output of the inverter 16 and the inactive period of the signal RA is T+DELTAt.

Inventors

• 👤 Takayuki Watanabe
• 👤 敬行 渡辺

Bibliographic Details