Chroma signal emphasis/de-emphasis circuit

Abstract

Abstract PURPOSE:To obtain a common circuit for improving a chroma S/N ratio by obtaining a dynamic characteristic by connecting a trap circuit consisting of an inductance and a capacity, in parallel substantially to diodes connected in reverse parallel, and obtaining an opposite dynamic characteristic by a subtraction. CONSTITUTION:A chroma signal is supplied to a terminal 1, and supplied to a transistor (TR) Q8 through a switching circuit 5. Subsequently, it is led to a negative input side of a subtracting circuit 6 from the TRQ8, and also a pair of differential TRs Q10, Q11 are driven through a TRQ9. A trap circuit of an inductance L1 and a capacity C3 is connected to the collector of the TRQ10, and the maximum level by a pin 10 is limited by diodes D1, D2 connected in reverse parallel. An emphasized chroma signal is outputted to a terminal 2. At the time of reproducing, an emphasized signal is supplied to a terminal 3, and a signal of the pin 10 is subtracted by an adding circuit of TRs Q1, Q2. Also, a TR8 is connected through TRs Q3-Q7 and the circuit 5, and a reproducing output is obtained in a terminal 4. In this way, S/N ratio can be improved.

Inventors

• 👤 Osamu Takase
• 👤 高瀬　修
• 👤 Tomomitsu Azeyanagi
• 👤 畔柳　朝光

Bibliographic Details