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JPS60694A Expired / Lapsed JP ⏱️ 0.0 years remaining

semiconductor memory

Assignee: Hitachi Ltd
•
Filing: 1983-06-15
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Granted: —
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Expires: 2003-06-15
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Abstract

Abstract PURPOSE:To attain a switch circuit with low power consumption and less noise by keeping a control signal of a switch circuit at the sense amplifier side inoperative in a memory circuit having sense amplifiers to a high level. CONSTITUTION:When the sense amplifier SA1 is inoperative, the control of switch circuits S0, S1 is performed with phiC00, phiC01 signals and the signals are controlled by an address signal inputted to circuit blocks A, B. The block A is the same circuit constitution as that of the block B and an address signal a'XA is changed to aXA. Thus, a'XB is inputted to both blocks and in forming the a'XB to 0V in the cycle of inoperative amplifier, the phiC00, phiC01 signals hold a VCC level. when the sense amplifier is operated, the a'XB is brought into high level. When the a'XA is brought into a high level, nodes N2, N4, N5, N7, N8 are brought into 0V in the circuit block B and the phiC01 is brought into 0V. On the other hand, since the aXA is 0V at the block A, the phiC00 keeps the VCClevel. The level of the phiC00, phiC01 signals is decided by combining the address signals in this way.

Inventors

  • 👤 Jun Eto
  • 👤 潤 衛藤
  • 👤 Ryoichi Hori
  • 👤 堀 陵一
  • 👤 Kiyoo Ito
  • 👤 清男 伊藤

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-31 09:02
CPC Classifications
F; F23; F23L; F23L9/00; H; H03; H03K; H03K19/00; H03K19/01; H03K19/017; H03K19/01707; F23Q; F23Q11/00; F24; F24B; F24B13/00; F24B13/02; H03K19/0175; H03K19/0185; H03K19/018507; F23M; F23M2900/00; F23M2900/05004

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