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JPS6068792A Expired / Lapsed JP ⏱️ 0.0 years remaining

Y/c separating circuit

Assignee: Sony Corp
•
Filing: 1983-09-22
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Granted: —
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Expires: 2003-09-22
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Abstract

Abstract PURPOSE:To obtain a Y/C separation circuit in which an optimum filter is decided definitely by applying weighting so as to minimize an error of a luminance signal and a chrominance carrier signal to a true value thereby separating the Y/C. CONSTITUTION:A digital composite NTSC color television signal sampled by a frequency of 4fsc is fed to an input terminal 1. The signal is fed to a series circuit comprising delay circuits 2-4 of one sample and a series circuit comprising delay circuits 9, 19 of one line respectively. Moreover, an output of the delay circuits 9, 19 is fed to a series circuit comprising delay circuits 10-13 and a series circuit comprising delay circuits 20-30 respectively. After each output of the delay circuits are extracted as shown in Fig. and weighted, addition/ subtraction is executed by an addition circuit or a subtraction circuit, the luminace signal Y is extracted from an output terminal 31 or the chrominance carrier signal C is extracted from an output terminal 32.

Inventors

  • 👤 Tetsujiro Kondo
  • 👤 哲二郎 近藤

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-05 19:38
CPC Classifications
H; H04; H04N; H04N9/00; H04N9/77; H04N9/78

Claims Analysis

Total Claims: 0
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References Cited (Backward Citations)

JPS56122285A Cited
JPS5810913A Cited

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