Mos type semiconductor integrated circuit device and manufacture thereof

Abstract

Abstract PURPOSE:To increase versatility on the design of the arrangement and wiring of a transistor by a method wherein a poly Si wiring and a polyside wiring, which is formed by superposing poly Si and a silicide, are used as the gate electrode wiring of an MOS transistor. CONSTITUTION:A field oxide film 2 is provided on a P type Si substrate 1, a poly Si wiring 4 is provided on a gate oxide film 3, and a polyside wiring 6 is formed on a gate oxide film 5. Then, an N<+> diffusion layer 7 is provided, PSG8 is coated, and an Al wiring 9 is attached. According to this method, the versatility in pattern design of the gate wiring of FET, a word wire or the electrode of a capacity, the arrangement and wiring of a resistive layer and the like, can be increased in the formation of IC of DRAM. Also, if the threshold voltage is determined for every electrode material when the threshold voltage is coexisted, the photomask process of channel doping can be omitted, thereby enabling to simplify the process of manufacture.

Inventors

• 👤 Matsuo Ichikawa
• 👤 市川　松雄

Bibliographic Details