Pll device

Abstract

Abstract PURPOSE:To obtain a PLL device whose response time is short, by operating an analog switch, which is provided between a loop filter and a phase comparator, a certain time after the power is supplied to a voltage controlled oscillator. CONSTITUTION:An analog switch SW3 which holds the electric charge of a filter 4 is provided between a phase comparator 2 and a loop filter 4. An intermitted signal A for battery saving is inputted to a terminal 10, and a power switch SW7 is closed by the high level of the signal A, and power is supplied to each part of the PLL device. An output signal B of a timing circuit 8 has the waveform shaped and goes to high-level a time tb after. The switch SW3 is switched synchronously with the signal B and connects the comparator 2 and the filter 4 at the time when the signal B is in the high level. A voltage control oscillator 6 starts oscillating by the high level of the signal A; and since the output level of the comparator 2 and the held voltage of the filter 4 are approximately equal to each other by the switch SW3, a transient response of a loop passing a frequency divider 5 is reduced, and thus, the PLL device for battery saving whose rise and response characteristics are good is constituted.

Inventors

• 👤 Sotoaki Babano
• 👤 馬場野　外明

Bibliographic Details