Dielectric isolation method

Abstract

Abstract PURPOSE:To obtain an extremely microscopic dielectric isolation structure of excellent surface flatness as well as to accomplish the state of high density and microscopic formation of a VLSI (very large scale integrated circuit) by a method wherein, after an insulating material has been buried in a groove by performing a bias sputtering method, the insulating material formed on the area other than an insulated region is selectively removed in a self-matching manner. CONSTITUTION:A resistor pattern 4 is formed on an Si substrate 1 excluding insulated regions 2 and 3 by performing an ordinary lithographic method, and a dry etching is performed vertically on the Si substrate 1 using said resist pattern 4 as a mask. After the resist pattern 4 has been removed, an insulating material 5 is coated on the whole surface by performing a bias sputtering. Then, a dry or wet etching is performed on the whole surface of the SiO2 5, and the etching is finished at the point of time when the upper end part 6 of the isolation groove is exposed. Subsequently, a photoresist 7 is coated on the whole surface, and the part 8 located within the region other than isolated regions 2' and 3' is selectively removed. Then, SiO2 films 9 and 9' on the area other than the isolation region is removed by performing a wet etching, and then the photoresist is removed. Through the above-mentioned procedures, SiO2 can be simply buried into the isolation grooves 2' and 3' having different width in a self-matching manner.

Inventors

• 👤 Nobuo Hasegawa
• 👤 昇雄 長谷川
• 👤 Yoshio Honma
• 👤 喜夫 本間
• 👤 Sukeyoshi Tsunekawa
• 👤 恒川　助芳
• 👤 Yoshifumi Kawamoto
• 👤 川本　佳史
• 👤 Tokuo Kure
• 👤 久礼　得男

Bibliographic Details