Logical circuit

Abstract

Abstract PURPOSE:To decrease the signal propagation time and also to reduce the occupied area in constituting an integrated circuit by connecting the 1st input terminal to a gate of the 2nd P and N-channel MOS transistors (TRs). CONSTITUTION:Since the input terminal 1 is connected only to the gate of the P-channel MOS TR10 having a high impedance and the gate of the N-channel MOS TR12, the input capacitance is very small and the signal propagation time is decreased. Further, the circuit consists of five P-channel MOS TRs and five N-channel MOS TRs and the area of a mask pattern is decreased in constituting an integrated circuit.

Inventors

• 👤 Koichi Kikuchi
• 👤 菊地　興一
• 👤 Shigeaki Nagakubo
• 👤 長久保　重明

Bibliographic Details