Semiconductor storage circuit

Abstract

Abstract PURPOSE:To improve the wiring efficiency by using a read/write field effect transistor (FET) in a static RAM cell as an ROM cell and constituting the ROM and the RAM in one cell to reduce an address decoder. CONSTITUTION:The static RAM cell 45 consists of an inverter comprising FET 29-32 and FETs 27, 28 constituting the ROM cell connected between its output and digit lines 41, 42 and decided to obtain a prescribed ROM output by the size. At read of the ROM cell, the lines 41, 42 are precharged by a signal phiP, signals phiRW and phiROM go to ''H'' and the level of the lines 41 and 42 is decided by the ratio of size of depletion FETs 23, 25 of pull-up circuits 43, 44, enhancement FETs 24, 26 and FETs 27, 30, 28 and 32. The FETs 27, 28 are used as the ROM cell by designing the size of the FETs 27, 28 depending whether the level of the lines 41, 42 is at ''H'' or the RAM cell data is outputted and one goes to ''H'' and the other goes to ''L''.

Inventors

• 👤 Toshiyoshi Iwata
• 👤 岩田　利喜

Bibliographic Details