Semiconductor storage device

Abstract

Abstract PURPOSE:To speed up the operation of a device in writing and reduce the power consumption by charging bit lines by using the information of a write control signal line only when a memory cell is not in a write state. CONSTITUTION:The output of a CMOS inverter logical circuit 19 is connected to a bit line 8 and the input is connected to the output a CMOS logical circuit 20 in a writing circuit 50. Similarly, the output of a CMOS inverter logical circuit 23 is connected to the bit line 9, and the input is connected to the output of a CMOS logical circuit 22. One input of both logical circuits 20 and 22 is connected to the write control signal line 17, and the other input is connected to the output of a CMOS inverter logical circuit 21; and the input of this logical circuit 21 and the other input of the logical circuit 22 are connected to an information input signal line 13. Write information inputted externally through the information input signal line 13 during writing operation is transmitted to the bit lines 8 and 9, and the bit lines 8 and 9 are charged up to the source voltage value when the writing operation is not performed.

Inventors

• 👤 Akira Yonezu
• 👤 亮 米津
• 👤 Kazuhiro Sakashita
• 👤 和広 坂下

Bibliographic Details