Semiconductor device

Abstract

Abstract PURPOSE:To contrive to improve the characteristics by reducing the gate-source series resistance by a method wherein semiconductor impurity layers serving as the source and drain regions are formed so as to incline from the source side to the drain side. CONSTITUTION:An N<+> layer 6 is formed by ion implantation from an oblique direction of an injection angle at 30-70 deg., with a provisional gate metal 4 and an SiO2 or SiN film 5 left on its side wall as mask, by the use of an N type impurity such as Si. Here, the oblique direction is a direction selected in such a manner that the source side of a GaAs MESFET becomes closer in the distance to the provisional gate, i.e., that inclination is present from the source to the drain. Next, a gate metal 9 is formed after removal of the metal 4. Since the GaAs MASFET thus formed has the source side N<+> close to the gate, and the drain side one away from the gate, the reduction of the source resistance can be contrived without causing the decrease of the gate-drain withstand voltage, resulting in the attainment to improve the FET characteristics which have not been conventionally obtained.

Inventors

• 👤 Kazuyoshi Ueda
• 👤 植田　和良

Bibliographic Details