Negative pulse reception circuit

Abstract

Abstract PURPOSE:To attain miniaturization, simplicity and low cost of the titled circuit by using a depletion FET as the 1st stage to drive only a positive power supply without using a negative power supply. CONSTITUTION:When no negative pulse signal is applied to an input terminal 31, the depletion FET32 is turned off and some current flows, then a transistor (TR) 35 is turned on and an output terminal 37 goes to an earth potential. When a negative pulse signal is fed in this state, the FET32 is turned on, the TR35 is turned off and the output terminal 37 goes to a high potential. When this negative pulse signal is restored to the earth potential, the FET32 is turned off, the TR35 is turned on and the output terminal 37 goes to the ground potential. Even if the negative pulse signal is inputted, since a positive pulse is outputted without using a negative power supply, the circuit is miniaturized, simplified and constituted inexpensively.

Inventors

• 👤 Toru Takei
• 👤 亨 武井
• 👤 Koji Tanigawa
• 👤 谷川　廣治
• 👤 Tadashi Kato
• 👤 正 加藤

Bibliographic Details